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Receive and monitor FPGA data over ethernet#1

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grihey wants to merge 1 commit intomasterfrom
cursor/receive-and-monitor-fpga-data-over-ethernet-62c8
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Receive and monitor FPGA data over ethernet#1
grihey wants to merge 1 commit intomasterfrom
cursor/receive-and-monitor-fpga-data-over-ethernet-62c8

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@grihey grihey commented Oct 11, 2025

Implement a Python3 CLI client to receive high-rate ADC data and low-rate status UDP packets from an FPGA board, send start/stop commands, and report live statistics.


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This commit introduces a Python script for receiving UDP data from an FPGA, monitoring status, and optionally writing data to a file.

Co-authored-by: grihey138 <grihey138@gmail.com>
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cursor bot commented Oct 11, 2025

Cursor Agent can help with this pull request. Just @cursor in comments and I'll start working on changes in this branch.
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